As technologies and applications evolve, so should the circuits that run them. In GAMMA, we devote ourselves to create innovative architectures and design methods for the next-generation analog mixed-signal integrated systems, and use them to drive advancement in emerging technology trends, including ubiquitous sensing, millimeter wave communication and implantable healthcare. Currently, we are particularly interested in the following topics:
1. Digital-Alike Analog Mixed-Signal Architectures and Their Design Automation
Till date, the designs of analog mixed-signal (AMS) and RF integrated circuits (ICs) still require intensive manual efforts in each step in the design cycle. Such design process is not only time consuming but also error-prone. As semiconductor process scaling continues, the increasingly complicated design rules further exacerbate this situation, bringing strong impact on the cost and time-to-market for both commercial and R&D perspectives. Thus, making AMS IC design more intelligent and automatable is becoming a demanding and meaningful research focus. The historic approaches for AMS IC design automation have been mostly concentrated on the area of computer aided design (CAD), where algorithms are devised to automate the design of existing, classic analog circuits. Nevertheless, many classic analog circuits have to be optimized in a holistic fashion on the transistor-level with a large amount of design parameters (channel length/width, bias voltage/current, threshold voltage, etc.). It is thus tremendously challenging to abstract the design process and develop a reliable algorithm. The layout-sensitive nature of traditional AMS circuit topologies creates more obstacles. For this reason, AMS IC CAD research has been progressing slowly. It requires more efforts to make it practical and mature.
To this end, we have been exploring solutions from another angle: to develop innovative AMS circuit architectures that can facilitate design and layout automation. We exploit and optimize various techniques, such as time-domain analog signal processing, passive switched-capacitor circuits and digital background calibration, to construct analog circuits through extensive use of digital-alike structures and standard cells. The resulted analog designs gain the traits of digital circuits, that they can be characterized by a simple set of gate-level parameters and robust against layout imperfection. They thus become more amenable to algorithm development and leverage many existing digital design tools. This research is expected to foster a strong interdisciplinary collaboration between circuit design and computer science.
Related publications: ESSCIRC 16, JSSC 17, DAC 17, CICC 19
2. Ultra-Low-Power Sensor and Bio-Electronic Interface
With the booming trend of Internet-of-Things (IoT) and the growing focus on medical healthcare, the need for miniaturized sensors and readout circuits have been raised to a whole new level. As a huge amount of sensors and their readouts are to be integrated in a miniaturized form and deployed wirelessly, the circuit area and power requirements have become more and more critical. At the same time, a good measure in the conventional metrics such as noise and dynamic range (DR) must not be sacrificed. Traditionally, the circuits in a sensing chain are designed separately by people with different expertise. For example, a classic sensor readout circuit composes of a low-noise instrumentation amplifier (IA) followed by an ADC, where the IA and ADC are often optimized individually. Looking forward, this approach may not be able to satisfy these upcoming requirements as it finds it difficult to simultaneously realize compactness, low power and low noise. To address this challenges, we have been working on new types of sensor readout designs, such as direct-digitizing readout, as well as sensor-specific interfaces. We believe a sensor-interface co-design/co-optimization approach provides a promising path to fulfill the hardware needs in IoT and personalized healthcare.
Related publications: ISSCC 18, JSSC 18, ISSCC 19, CICC 19
3. High-Performance Data Conversion and Timing Generation System
The next-generation high-speed communication standards (such as 5G and optical/wireline) demands “upgrades” in many aspects of the system, including the circuits, and some can be quite challenging. But it also means innovation and revolution. One topic we are highly intrigued by is the millimeter (mm)-wave massive multi-input multi-output (MIMO) systems. The underlying technique for massive MIMO is to exploit beamforming with a large number of antennas (e.g. 128) to enhance communication quality. Beamforming can be performed in either analog or digital domain (or hybrid). Compared to the analog approach, digital beamforming provides much greater flexibility due to the high programmability of digital circuit, but it required a high-speed data converter in every signal chain or antenna. At this stage, existing high-speed data converters are yet to have good enough power efficiency to avoid overheating issue under such a large integration, thus rendering compact and mobile digital beamforming an unresolved challenge. We will lead the efforts to develop highly power-efficient giga-sample-rate data converters to drive various of emerging communication needs. With data converter as a pioneer, we will also investigate timing generation, recovery and wireline interface circuits.
